Although in recent weeks we have seen regular price drops for graphics cards, both NVIDIA and AMD, many gamers are already waiting for the next generation to debut (hopefully this time with better availability from the moment of launch). NVIDIA (the Ada architecture) and AMD (the RDNA architecture 3) will present their proposals. There is still a lot of mystery about the specifications of individual cards, but from time to time more or less reliable reports about what to expect from cards enter the network. This time we bring interesting information about the possible date of the unveiling of the first NVIDIA GeForce RTX 4000 cards. If confirmed, the new generation will reach the market sooner than expected.
According to unofficial information, the first NVIDIA GeForce RTX 4000 graphics cards will be presented during the holiday season. Gamescom appears to be a good place for a premiere, as was the debut of the Turing architecture (GeForce RTX 2000).
NVIDIA GeForce RTX 4000 graphics cards will be built using TSMC 4N lithography. The advantage over AMD RDNA 3 at first?
According to kopite7kimi, the new NVIDIA architecture will be presented in the third quarter of the year. Although the information provided is for “early Q3,” we wouldn’t be surprised if NVIDIA decided to release it, say, during the Gamescom trade show. The company came up with a similar solution when introducing the GeForce RTX 2000 (Turing) cards. Knowing the manufacturer’s offers so far, at least three cards will be revealed initially: GeForce RTX 4090, GeForce RTX 4080 and GeForce RTX 4070.
– kopite7kimi (@kopite7kimi) May 15 2022
NVIDIA GeForce RTX 4000 – Lots of information about possible specifications and performance of Ada graphics cards
Kopite7kimi on the basis of all existing information he prepared Also a block diagram intended to show the Ada AD102 graphics chip. It shows 12 GPCs, twice what we obtained in the TU102 system, 70% more GA102 and 50% more GA100 (Ampere) and GH100 (Hopper) cores. If the information is confirmed so far, the AD102 chip will provide 192KB of L1 cache per SM block, which will also be 50% higher than the Ampere architecture. Interestingly, the new chassis will also bring in twice as many ROPs – this applies to comparing the AD102 system with the GA102, GA100 or GH100. The L2 cache is expected to be 96MB – 16 times more compared to the Turing or Ampere architecture.
Source: Twitter @kopite7kimi
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